1. Field of the Invention
The present invention relates to a charge-coupled device (CCD) and a method of fabricating the same, and more particularly, it relates to a charge-coupled device having a plurality of gate electrodes arranged at a prescribed interval and a method of fabricating the same.
2. Description of the Background Art
A charge-coupled device (CCD) employed for an image sensor or the like is known in general. FIG. 21 is a sectional view showing the structure of a conventional charge-coupled device having a two-layer gate electrode structure. Referring to FIG. 21, a gate insulator film 110 consisting of a silicon oxide film 110a and a silicon nitride film 110b is formed on a silicon substrate 101 in the conventional charge-coupled device. First-layer gate electrodes 120 consisting of polysilicon are formed on the gate insulator film 110 at a prescribed interval. Silicon oxide films 121 are formed on the upper and side surfaces of the first-layer gate electrodes 120.
Second-layer gate electrodes 130 are formed between adjacent ones of the first-layer gate electrodes 120 through the silicon oxide films 121. Impurity regions 102 are formed on surface portions of the silicon substrate 101 located under the second-layer gate electrodes 130. The impurity regions 102 are provided for causing difference between potentials under the adjacent first-layer gate electrodes 120 and the second-layer gate electrodes 130. The charge-coupled device easily transfers charges through the impurity regions 102.
An interlayer dielectric film (not shown) having contact holes is formed on the first-layer gate electrodes 120 and the second-layer gate electrodes 130. The first- and second-layer gate electrodes 120 and 130 are electrically connected to upper wires (not shown) through the contact holes.
Each first-layer gate electrode 120 and each second-layer gate electrode 130 are paired with each other, and the charge-coupled device applies two-phase voltages φ1 and φ2 different from each other to adjacent pairs of the first- and second-layer gate electrodes 120 and 130 respectively thereby transferring charges.
For example, Japanese Patent Laying-Open No. 11-204776 (1999) discloses the aforementioned conventional charge-coupled device having a two-layer gate electrode structure.
FIGS. 22 to 24 are sectional views for illustrating a fabrication process for the conventional charge-coupled device having a two-layer gate electrode structure shown in FIG. 21. The fabrication process for the conventional charge-coupled device having a two-layer gate electrode structure is now described with reference to FIGS. 21 to 24.
First, the silicon oxide film 110a and the silicon nitride film 110b are successively formed on the silicon substrate 101 thereby forming the gate insulator film 110 consisting of the silicon oxide film 110a and the silicon nitride film 110b, as shown in FIG. 22. A polysilicon film (not shown) is deposited on the gate insulator film 110 and thereafter patterned through lithography and etching, thereby forming the first-layer gate electrodes 120.
Then, the surfaces of the first-layer gate electrodes 120 are thermally oxidized thereby forming the silicon oxide films 121 on the upper and side surfaces of the first-layer gate electrodes 120, as shown in FIG. 23. The first-layer gate electrodes 120 are employed as masks for injecting an impurity into the silicon substrate 101, thereby forming the impurity regions 102.
Then, a polysilicon film (not shown) is deposited on the overall surface and thereafter patterned through lithography and etching thereby forming the second-layer gate electrodes 130, as shown in FIG. 24.
Thereafter the interlayer dielectric film (not shown) is formed on the overall surface and formed with the contact holes (not shown). The first- and second-layer gate electrodes 120 and 130 are electrically connected with upper wiring layers (not shown) through the contact holes. Thus, the conventional charge-coupled device having a two-layer gate electrode structure is formed as shown in FIG. 21.
However, the conventional charge-coupled device having a two-layer gate electrode structure shown in FIG. 21 requires the steps of forming the first-layer gate electrodes 120 and forming the second-layer gate electrodes 130, and hence the fabrication process is complicated and working dispersion is disadvantageously easily caused. When the charge-coupled device is employed as an image sensor, difference in spectral sensitivity is disadvantageously caused between the first- and second-layer gate electrodes 120 and 130.
A charge-coupled device having a single-layer gate electrode structure is also proposed in general. According to the single-layer gate electrode structure, single-layer (first-layer) gate electrodes are formed at a prescribed interval, with no formation of second-layer gate electrodes. Therefore, a fabrication process for this charge-coupled device is not complicated and hardly causes working dispersion, dissimilarly to that for the aforementioned charge-coupled device having a two-layer gate electrode structure. Further, this charge-coupled device has no problem of difference in spectral sensitivity between first- and second-layer gate electrodes.
In the charge-coupled device having a single-layer gate electrode structure, however, it is disadvantageously difficult to reduce the interval between adjacent gate electrodes. When forming single-layer gate electrodes at a prescribed interval by patterning gate electrodes through lithography with positive resist or the like, the interval between the gate electrodes is disadvantageously restricted due to limitation of the lithography technique. When patterning the gate electrodes by etching through a mask of a resist film, the gate electrodes are easily reduced in width beyond the pattern of the resist film. Therefore, the interval between the gate electrodes disadvantageously tends to exceed the minimum critical dimension of lithography. Thus, sensitivity or saturation power of the charge-coupled device having a single-layer gate electrode structure is disadvantageously easily reduced due to the easily increased interval between the gate electrodes. Consequently, performance of the charge-coupled device is disadvantageously easily reduced.
In the fabrication process for the charge-coupled device having a two-layer gate electrode structure, the impurity regions 102 can be formed in a self-aligned manner by injecting the impurity into portions located under the regions formed with the second-layer gate electrodes 130 in a self-aligned manner through the masks of the first-layer gate electrodes 120 in the step shown in FIG. 23. Thus, the charge-coupled device can easily transfer charges by driving the gate electrodes 120 and 130 with the two-phase applied voltages φ1 and φ2.
In the fabrication process for the charge-coupled device having a single-layer gate electrode structure, on the other hand, it is difficult to inject an impurity into portions located under specific gate electrodes in a self-aligned manner. In this case, the impurity is selectively injected into the portions located under the specific gate electrodes through a mask of a resist film or the like. When the impurity is injected through the mask of the resist film, however, accuracy in impurity injection depends on the accuracy of the lithography dissimilarly to the case of injecting the impurity in a self-aligned manner, and hence the regions formed by the impurity are disadvantageously dispersed. When the regions formed by the impurity are dispersed, it is difficult to excellently transfer charges. Thus, the charge-coupled device is disadvantageously reduced in charge transferability.
When the charge-coupled device having a single-layer gate electrode structure substitutes for the conventional charge-coupled device having a two-layer gate electrode structure, performance of the charge-coupled device such as sensitivity or saturation power is disadvantageously reduced due to the increased interval between the gate electrodes, as hereinabove described. In the single-layer gate electrode structure, further, the positions formed with the impurity regions are dispersed under the specific gate electrodes, and hence the charge-coupled device is also reduced in performance such as charge transferability.